Tools / Synchronous Buck Design Calculator

Synchronous Buck Design Calculator

Enter Vin, Vout, load, and switching frequency; get duty cycle, inductor ripple, RMS currents, output capacitance for a target transient, and a first-order loss breakdown.

Input voltage

V

Output voltage

V

Output current

A

Switching frequency

kHz

Inductance

µH

Inductor DCR

mΩ

High-side R_DS(on)

mΩ

Low-side R_DS(on)

mΩ

Switching transition

ns

rise + fall, hard-switched edge

Gate charge per device

nC

Gate drive voltage

V

Dead time

ns

per edge, body-diode conduction

Transient target

mV

Loop bandwidth

kHz

Model

What this does and does not include

Included

Ideal duty cycle, inductor ripple current, and ripple ratio against the 20–40 % rule of thumb
RMS currents in the inductor, both switches, and the input capacitor bank
Output capacitance for a ripple target and, separately, for a load-step target given a loop bandwidth
Conduction, hard-switching, gate-drive, dead-time body-diode, and DCR losses
Efficiency swept across the full load range, so you can see where the curve peaks

Not included

Core loss — geometry and material dependent; use the vendor's tool with the ripple figure above
Reverse-recovery and C_oss losses, which matter more as V_in and frequency rise
Capacitor ESR loss and DC-bias derating on ceramic output capacitors
Thermal coupling between devices, and any temperature dependence of R_DS(on)
Loop stability — the bandwidth field is an input here, not a result

Treat the output as a sizing pass that tells you whether a design is plausible and where the loss is concentrated. Anything that ships gets simulated and then measured.